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TRF7970A
SLOS743K – AUGUST 2011 – REVISED APRIL 2014
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6.3.3
Power Modes
The chip has several power states, which are controlled by two input pins (EN and EN2) and several bits
in the chip status control register (0x00) (see Table 6-3 and Table 6-4 ).
Table 6-3. 3.3-V Operation Power Modes (1)
Mode
Power Down
Sleep Mode
Standby Mode at
+3.3 VDC
Mode 1 at +3.3 VDC
Mode 2 at +3.3 VDC
Mode 3 (Half Power) at
+3.3 VDC
Mode 4 (Full Power) at
+3.3 VDC
EN2
0
1
X
X
X
X
X
EN
0
0
1
1
1
1
1
Chip
Status
Control
Register
(0x00)
XX
XX
80
00
02
30
20
Regulator
Control
Register
(0x0B)
XX
XX
00
00
00
07
07
Transmitter
OFF
OFF
OFF
OFF
OFF
ON
ON
Receiver
OFF
OFF
OFF
OFF
ON
ON
ON
SYS_CLK
(13.56
MHz)
OFF
OFF
ON
ON
ON
ON
ON
SYS_CLK
(60 kHz)
OFF
ON
X
X
X
X
X
V DD_X
OFF
ON
ON
ON
ON
ON
ON
Typical
Current
(mA)
<0.001
0.120
2
3
9
53
67
Typical
Power
Out
(dBm)
-
-
-
-
-
14.5
17
(1)
X = Don't care
Table 6-4. 5-V Operation Power Modes (1)
Mode
Power Down
Sleep Mode
Standby Mode at
+5 VDC
Mode 1 at +5 VDC
Mode 2 at +5 VDC
Mode 3 (Half Power) at
+5 VDC
Mode 4 (Full Power) at
+5 VDC
EN2
0
1
X
X
X
X
X
EN
0
0
1
1
1
1
1
Chip
Status
Control
Register
(0x00)
XX
XX
81
01
03
31
21
Regulator
Control
Register
(0x0B)
XX
XX
07
07
07
07
07
Transmitter
OFF
OFF
OFF
OFF
OFF
ON
ON
Receiver
OFF
OFF
OFF
OFF
ON
ON
ON
SYS_CLK
(13.56
MHz)
OFF
OFF
ON
ON
ON
ON
ON
SYS_CLK
(60 kHz)
OFF
ON
X
X
X
X
X
V DD_X
OFF
ON
ON
ON
ON
ON
ON
Typical
Current
(mA)
<0.001
0.120
3
5
10.5
70
130
Typical
Power
Out
(dBm)
-
-
-
-
-
20
23
(1)
X = Don't care
Table 6-3 and Table 6-4 show the configuration for the different power modes when using a 3.3-V or 5-V
system supply, respectively. The main reader enable signal is pin EN. When EN is set high, all of the
reader regulators are enabled, the 13.56-MHz oscillator is running and the SYS_CLK (output clock for
external micro controller) is also available.
The input pin EN2 has two functions:
?
?
A direct connection from EN2 to V IN to ensure the availability of the regulated supply V DD_X and an
auxiliary clock signal (60 kHz, SYS_CLK) for an external MCU. This mode (EN = 0, EN2 = 1) is
intended for systems in which the MCU is also being supplied by the reader supply regulator (V DD_X )
and the MCU clock is supplied by the SYS_CLK output of the reader. This allows the MCU supply and
clock to be available during sleep mode.
EN2 enables the start-up of the reader system from complete power down (EN = 0, EN2 = 0). In this
case the EN input is being controlled by the MCU (or other system device) that is without supply
voltage during complete power down (thus unable to control the EN input). A rising edge applied to the
EN2 input (which has an approximately 1-V threshold level) starts the reader supply system and 13.56-
MHz oscillator (identical to condition EN = 1).
18
Detailed Description
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